This invention relates to the fabrication of integrated circuits and more particularly to a novel technique or method of fabricating such circuits which involves a combination of direct writing electron beam lithography and photo replication by means of proximity printing.
Integrated circuit elements and the metallic interconnecting conductors thereon can be patterned on a wafer entirely by means of direct writing electron beam lithography (EBL), however this fabrication technique requires excessive beam writing time of complex and expensive EBL machines and the complex circuit and conductor patterns so lithographed with many different spacings and widths of lithographed features requires complex correction of the computer-stored pattern to correct for proximity effects. Proximity effects are the widening of the lithographed features caused by forward and backscattering of the electron beam as it penetrates the electron resist material which covers the wafer. The magnitude of the proximity effect and hence the correction factor required is a function, among other things, of the widths of the features being lithographed.
The use of photolithography to imprint patterns on a wafer by means of a patterned mask has been extensively used in the past but has numerous disadvantages for the fabrication of very large scale integrated circuits. Masks used for contact printing necessarily require close contact between the mask and the wafer and these masks can be easiy damaged by such contact and thus have short life. Proximity printing in which the mask is spaced from the wafer avoids the mask wear due to contact but it has fundamental limitations which make accurate and thus high density patterning impossible. These limitations comprise, for example, the diffraction of the ultraviolet flux as it passes through the mask and the formation of ultraviolet standing waves in the replication resist material. Also, it is impossible to obtain a sharp focus over the entire chip or wafer area with proximity printing.
The present hybrid technique or method eliminates most all of the disadvantges of the direct writing EBL technique and the photo mask replication technique to provide high accuracy , high density lithographing of integrated circuits in an economical and simple manner.